In computer hardware, shared memory refers to a block of memory that can be accessed by multiple bus masters in a multiple bus master computer system. A shared memory system is relatively easy to program since all bus masters share a single view of data and the communication between the bus masters can be as fast as memory accesses at same locations.
However, in a system where shared memory is being used, there is a problem of inconsistent memory data. This data which may be written by one of the multiple bus masters may or may not be correct when written. Therefore, it is very difficult to rely on the data written and read from the multiple bus master computer system and hence memory integrity needs to be checked.
In a system containing a single master, a simple means to verify memory integrity is through an in-line write modify read. Specifically, every write initiated by the master is immediately read back by that master to check that the data read back is the same as the data written.
In systems containing multiple masters, elaborate methods of verifying memory integrity are utilized because of a need to verify potential overlapping writes from multiple bus masters or from the same bus master. Some of the common methods are monitoring memory transactions, extracting the content of the external memory model and validating them using a reference model or a Post processing memory dump.
One of these involves both the instantiation of complex Verilog models and supporting code whereas, and the other, though simplistic, still require a large amount of code to parse and match all memory transactions.
Therefore, in light of the above discussion there is a need of a method and a system that allows easy verification of the integrity of a shared memory without involving parsing large amounts of code or using complex mathematical models.